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Connector and cable interconnects solving problems and providing a path forward

April 26, 2024 By Ed Cady Leave a Comment

Past and current data center hardware systems developers occasionally require and evaluate unexpected or previously unimagined connectivity solutions. These novel solutions often require a very short development cycle and low cost of ownership targets. Leading-edge test and measurement equipment developers sometimes need a good fast solution as a bridge product before qualifying a new connector and cable interconnect family.

Very leading-edge deep packet inspection processor chips are perennially used for gov/mil inspector programs that use different advanced technologies to achieve pioneering breakthrough data rate speeds and bandwidth.

The following are some past and new very high-speed interconnect innovation examples:

ZLink

ZLink™ was developed by Z–Plane Inc. circa 2014. This interconnect solution is a family of PCBA FinRail-style jumpers using stepped oblique connectors. It was developed using the concept of implementing a higher-speed digital Link with a planar circuit structure to achieve higher performance and efficiencies. It was more of a pay-as-you-need per-channel variable and substrate type, per its reach across large enhanced but very usually spendy PCB backplanes, midplanes, and bottom planes (storage drop-in-HDD or SDD modules). This PCB jumper technology was like FinFET chip designs, as it used the front and back planar structures. Figure 1 is an example of FinFET chip structure:

Figure 1. A FinFET chip structure.

ZLink™ products were based on using oblique press-fit or SMT connector contacts and a higher-performance substrate PCB jumper to meet electrical performance needs.

See below Figure 2 — a standard PICMG-embedded computer backplane using  Z-Link connectors on various length low profile jumper PCBAs with differing substrate types. For example, long-reach jumpers used MEGTRON 6 or 7 while short-reach jumpers used MEGTRON 2 or 4. These were used to form an installed array of minimally used high-speed substrate material types. The large main board remained a very low-cost factor substrate type. The resultant cost for all PCB material was greatly reduced.

Figure 2. A standard PICMG-embedded computer backplane using  Z-Link connectors.
Figure 3. A 14-slot solution.

Figure 3 is a 14-slot solution based on extending new generation high-speed SERDES chip signal channels’ reach and using a reduced amount of main board high-speed PCB material types that lowered total board assembly cost. So, the large, main PCB substrate remained an older, simpler-to-build FR-4 type substrate or was reduced to a much lower-cost material type. These differential pair circuit products were developed for 25GNRZ and 50GNRZ per lane performance system Link applications. They were designed and tested successfully for budget reach key requirements like latency and BER.

The Z-Link novel staggered oblique connector allowed the transverse shortest direct point-to-point, high-speed jumper connection across a large or medium-sized PCBA. Figure 4 is a look at the novel Z-axis adapter connector and jumper PCBs. The guide posts and other connector features facilitated automated assembly manufacturing, which enabled a new stackable PCBA high-speed jumper product. Figure 5 is an example application drawing.

Figure 4. A look at the novel Z-axis adapter connector and jumper PCBs.
Figure 5. Application drawing example.

Figure 6 is a front and back photo view below of an early ZLink product announcement working within the PICMG community in an ATCA backplane system demonstration.

Figure 6. A front and back photo view below of an early ZLink product announcement.

This ZLink solution graphic below (Figure 7) shows various jumpers and connector features required. These jumpers were obliquely connected to the bottom side of a drop-in storage module type Baseplane or Bottomplane very large PCB. Concept designs like the two below were done for 24 G SAS drop-in memory and storage systems as well as 12 G SAS.

Figure 7. This graphic shows various jumpers and connector features required in a ZLink solution.

So, these oblique fly-over-style PCB-based jumper assemblies have been replaced by both inside-the-box fly-over-style copper and optical cables. Many current systems now use all copper-cabled backplane systems, and more are using hybrid and all-optical dataplanes.

E-Shield

A company of the same name produced E-Shield™ circa mid-2000s. This novel 19-fiber crimping circular metal ferrule was fitted into both SC and LC connectors using MM or SM fiber types. It supported fan-out and trunked Link applications with sidebands. It was used in test and measurement, medical, and military applications. This connector came after another novel solution, the 12-fiber SC Nanoprecision connector. This allowed the use of ribbon fiber in many large SC-based installations.

E-Tube

E-Tube™ is a new 2024 disruptive novel media connector and cabling product developed and produced by Point2 LLC. This product is said to provide multi-terabit millimeter wave RF wirelessly TX/RX transmitted through a specific common plastic dielectric waveguide. It claims to be 80% lighter and 40% less volume versus AEC copper cabling. It also claims to be 50% lower in power and cost than optical cabling like AOCs. Figure 8 is a Point2 LLC marketing burb.

Figure 8. A Point2 LLC marketing burb.

These products use various types of industry-standard SFP, QSFP, QSFP-DD, OSFP, and other pluggable connectors. Their product literature claims the capability of running 100 G per lane for 16 lanes supporting a 1.6 G new cable media Link. It will be good to learn more about their technology and product roadmap. Especially how one transmission E-Tube core can handle several RF wireless channels with clean and clear performance.

An RF SoC chip is embedded with the internal printed circuit paddleboard of a plug connector. Figure 9 is a graphical representation of how the system works:

Figure 9. A graphical representation of how an RF SoC chip is embedded with the internal printed circuit paddleboard of a plug connector works.

Figure 10 is a look at the finished E-Tube product assembly:

Figure 10. A finished E-Tube product assembly.

It will be good to learn more about the shielding effectiveness of the RF Transmission SoC within the die-cast metal shell and plastic cable. Users will need to know the product’s BER, IL, Latency, or any FEC information. What is the cable rating relative to flammability ratings, operating temperatures, bending cycles, EMPs, and other radio frequency distortions and interferences?

Some observations, questions, and conclusions

It would be good to learn how many transmission lanes are feasible and at what tube diameter. Could it support 32-lane PCIe 7.0 and 64-lane CXL 4.0 Links applications? It seems that some top-of-the-board PECFF form factor, very high-lane-count ribbon twin-axial copper cables are being developed.

It also seems that E-Tube will need to meet the latest CMIS testing specifications and undergo some third-party testing within consortia like the InfiniBand Trade Association and Ethernet Alliance Plugfests. There is very little current public information on E-Tube, so interested parties should be aware. A lot of comparative information will be needed to help potential users decide on the feasibility of this product.

We have yet to learn how long and how many Link length reaches are supported by E-Tube pluggable cables. It would be good to know if this wireless RF SoC could evolve and support 400 G, 800 G, and 1600 G per lane transmission, as most optical roadmaps do.

Will OEMs, Hyperscalar end users, and DCI operators adapt to adding and using another media type’s technology, roadmap, and many more part numbers with product support, standardizing, and dual sourcing? Will E-Tube be used for internal pluggable flyover cables as well as external box-to-box? Will it compete well with hollow-core fiber and multi-lambda fiber cables? Time will tell.

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Filed Under: FAQ, Featured, Medical, Military, Products Tagged With: faq

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